3. Design a 3 bit counter which follows the sequence 0 -> 2 -> 3 -> 4 -> 7 -> 0. Note: The following are required for the lab Assignment: o Follow the sequential design procedure which is presented in the lab lecture notes. To make marking easier, route all the unused states to state 7. Use JK flip-flops in your counter circuits. Hand in: Show your design steps (in the lab notes) and the resulting circuit in Logisim. Remember to make screenshot and insert the image in you lab4.pdf file. Describe your testing procedures.