3. Implement the following bit sequential Adder-Subtractor design. X and Y are two operand inputs and Z is for the control signal i.e. Z is the selection bit. When Z has value 0 , the circuit is an adder, meanwhile, the D flip-flop should be initialized to 0 for each addition. When Z has value 1, it performs subtraction, meanwhile, the D flip-flop should be initialized to 1 for each subtraction. Test your Adder-Subtractor circuit on the following operations and use the 4-bit Shift Register to store and display their results. (Note: Start from the least significant bit and remember to initialize the D flip-flop accordingly) 0001+0011=? 0101+0010=? 01010011=? 00110101=? Hand-In X and Y are two operand inputs and Z is for the control signal i.e. Z is the selection bit. When Z has value 0 , the circuit is an adder, meanwhile, the D flip-flop should be initialized to 0 for each addition. When Z has value 1 , it performs subtraction, meanwhile, the D flip-flop should be initialized to 1 for each subtraction. Test your Adder-Subtractor circuit on the following operations and use the 4-bit Shift Register to store and display their results. (Note: Start from the least significant bit and remember to initialize the D flip-flop accordingly) 0001+0011=?0101+0010=?01010011=?00110101=? Hand-In - Hand in the complete circuits testing the four cases above. Use a 4-bit Shift Register to store and display their results and indicate the MSB and LSB. Make sure you have the images of all the completed circuits inserted in the Lab5.pdf file. - Describe the testing procedure used for Question 3 for addition and subtraction