Question: 3 . The serial - in serial - out register, the output is observed at Q 4 . The register is initialized ( at t

3. The serial-in serial-out register, the output is observed at Q4. The register is initialized (at t=0) to Q1Q2Q3Q4=1011. Suggest a sequence of bits applied at input terminal In such that the register at the end must have Q1Q2Q3Q4=0000. How many clock cycles are needed? (10 points)

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