3.(8 points - Correctness) Performance: Bower found two processors in another computer room and in this question we will compare the performance of two processors using a certain benchmark. Processor L1 Size L1 D-Cache Miss Rate L1 -Cache Miss Rate L2 Hit Time P1 4KB 6% 2% 0.4ns P2 8KB 2% 4% 0.9ns We are also given that accesses to the main memory takes 90ns. Additionally Processor 2 has to execute 15% more instructions than Processor 1. It is also seen that only 30% of the instructions access memory (i.e, lw and sw instructions). Profiling the code also showed us that 15% of the instructions were branch instructions. Both processors support branch prediction with 90% of the branches being predicted accurately and mis-predicts with P1 having a 2 cycle penalty and P2 having a 3 cycle penalty. Assume that we have no data hazards. (a) If L1 Hit time determines the cycle time then what is the clock rate of P1 and P2 ? (b) Calculate how many cycles it takes to access data memory for both the processors. 3.(8 points - Correctness) Performance: Bower found two processors in another computer room and in this question we will compare the performance of two processors using a certain benchmark. Processor L1 Size L1 D-Cache Miss Rate L1 -Cache Miss Rate L2 Hit Time P1 4KB 6% 2% 0.4ns P2 8KB 2% 4% 0.9ns We are also given that accesses to the main memory takes 90ns. Additionally Processor 2 has to execute 15% more instructions than Processor 1. It is also seen that only 30% of the instructions access memory (i.e, lw and sw instructions). Profiling the code also showed us that 15% of the instructions were branch instructions. Both processors support branch prediction with 90% of the branches being predicted accurately and mis-predicts with P1 having a 2 cycle penalty and P2 having a 3 cycle penalty. Assume that we have no data hazards. (a) If L1 Hit time determines the cycle time then what is the clock rate of P1 and P2 ? (b) Calculate how many cycles it takes to access data memory for both the processors