4- Consider a 32Mx8 SDRAM chip shown below 8-bit chunk Rows =8k Banks =4 Columns =1k...

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4- Consider a 32Mx8 SDRAM chip shown below 8-bit chunk Rows =8k Banks =4 Columns =1k (a) Suppose a PC has a 64-bit system (i.e., memory) bus. How many 32Mx8 SDRAM chips would be required to implement a single 256MB DIMM? (b) What would be the required burst length if L2 cache block size is 64 bytes? (c) If the 256MB DIMM is referred to as PC6400, what is the clock rate of the system or memory bus? (d) Determine the number of 256MB DIMMs required to implement 1 GB of main memory. (e) Show the address mapping for 32-bit physical address for 1 GB of main memory by indicating Rank ID, Bank ID, Row ID, and Column ID fields and the numbers of bits required for each field. 4- Consider a 32Mx8 SDRAM chip shown below 8-bit chunk Rows =8k Banks =4 Columns =1k (a) Suppose a PC has a 64-bit system (i.e., memory) bus. How many 32Mx8 SDRAM chips would be required to implement a single 256MB DIMM? (b) What would be the required burst length if L2 cache block size is 64 bytes? (c) If the 256MB DIMM is referred to as PC6400, what is the clock rate of the system or memory bus? (d) Determine the number of 256MB DIMMs required to implement 1 GB of main memory. (e) Show the address mapping for 32-bit physical address for 1 GB of main memory by indicating Rank ID, Bank ID, Row ID, and Column ID fields and the numbers of bits required for each field.

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a To implement a single 256MB DIMM we need to determine the number of chips required based on the ch... View the full answer