4. Given a 32 bit address space, a 256 KB cache, 16 bytes per block, answer the following questions and show the state of the cache at the end of instruction execution. Include instruction fetch memory accesses. All Show the tag value and Hit/Miss/Replace, in the tag column, "data" or "inst', in the data column, and the # of cache accesses for each instruction NDEX D TAG DATA DII IAG DATA 0C32 0C33 0C34 0C35 0C36 0C37 0C38 0C39 Cache Accesses 2DC328 2DC32E 2DC333 2DC339 mov RO, $5C37E] get value at $5C37E and copy to RO add RO,1 mov $5C37E],RO copy value in RO to $5C39E jmp $7C37A ; add 1 to RO and store in RO ; jump to address $7C38A 2DC33E 07C37A cmp R9,$5C320 je $8C32A sub R3, $94C32Esub value at $94C32E from R3, store in R3 mov [$BFC32C],R3copy contents of R3 to $BFC32C mov [$6C38F],R4 copy contents of R4 to $6C38F ; cmp R9 to number $5C320 07C380 ; branch NOT taken 07C385 07C38B 07C390 07C396 5. (2 pts) How many rows in this cache? 6. (2 pts) How many bits in the tag? 7. (2 pts) How many different addresses can map to the same row in the cache? 4. Given a 32 bit address space, a 256 KB cache, 16 bytes per block, answer the following questions and show the state of the cache at the end of instruction execution. Include instruction fetch memory accesses. All Show the tag value and Hit/Miss/Replace, in the tag column, "data" or "inst', in the data column, and the # of cache accesses for each instruction NDEX D TAG DATA DII IAG DATA 0C32 0C33 0C34 0C35 0C36 0C37 0C38 0C39 Cache Accesses 2DC328 2DC32E 2DC333 2DC339 mov RO, $5C37E] get value at $5C37E and copy to RO add RO,1 mov $5C37E],RO copy value in RO to $5C39E jmp $7C37A ; add 1 to RO and store in RO ; jump to address $7C38A 2DC33E 07C37A cmp R9,$5C320 je $8C32A sub R3, $94C32Esub value at $94C32E from R3, store in R3 mov [$BFC32C],R3copy contents of R3 to $BFC32C mov [$6C38F],R4 copy contents of R4 to $6C38F ; cmp R9 to number $5C320 07C380 ; branch NOT taken 07C385 07C38B 07C390 07C396 5. (2 pts) How many rows in this cache? 6. (2 pts) How many bits in the tag? 7. (2 pts) How many different addresses can map to the same row in the cache