Question: 4.23 If we change load/store instructions to use a register (without an offsety 1 ise 4.15) ly the address, these instructions no longer need to

4.23 If we change load/store instructions to use a register (without

4.23 If we change load/store instructions to use a register (without an offsety 1 ise 4.15) ly the address, these instructions no longer need to use the ALU. (See Exercise As a result, the MEM and EX stages can be overlapped and the pipeline has on four stages. 4.23.1 [10] How will the reduction in pipeline depth affect the cyde time? 51 How might this change improve the performance of the pipeline? 4.23.3 [5] How might this change pipeline? degrade the performance of 4.23 If we change load/store instructions to use a register (without an offsety 1 ise 4.15) ly the address, these instructions no longer need to use the ALU. (See Exercise As a result, the MEM and EX stages can be overlapped and the pipeline has on four stages. 4.23.1 [10] How will the reduction in pipeline depth affect the cyde time? 51 How might this change improve the performance of the pipeline? 4.23.3 [5] How might this change pipeline? degrade the performance of

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