4.5 For the problems in this exercise, assume that there are no pipeline stalls and that the breakdown of executed instructions is as follows:

add 20% addi 20% not 0% beq 25% lw 25% sw 10%

4.5.1 In what fraction of all cycles is the data memory used? % (Fill in a number between 0 and 99].

Hints: The data memory is only used by LW and SW instructions,

4.5.2 In what fraction of all cycles is the output of the sign-extend circuit needed (not ignored)? % (Fill in a number between 0 and 99].

Hints: The sign-extend circuit is actually computing a result in every cycle, but its output is ignored for ADD and NOT instructions.

The input of the sign-extend circuit is needed for ADDI (to provide the immediate ALU operand), BEQ (to provide the PC-relative offset), and LW and SW (to provide the offset used in addressing memory).