Question: 4.52 Design a 4-bit down-counter that has three control inputs: cnt enables counting up, clear synchronously resets the counter to all Os, and set synchronously

4.52 Design a 4-bit down-counter that has three control inputs: cnt enables counting up, clear synchronously resets the counter to all Os, and set synchronously sets the counter to all 1s: (a) using a parallel load register as a building block, (b) using flip-flops and muxes by following the register design process of Section 4.2. (Component design problem.)
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