$5\mathrm{.}16$ Marks$)$ Using the single$-$cycle processor diagram $($given as exam reference material$),$ hit tho corresponding date$/$control signal values for the following three instructions in the table below. Assume that they execute on a Bare Machine in the top down order, one afer the other. The PC address is shown to emphas of the order. To write the data signal values correctly you will need to carefully follow the given order of theinstructions. Your data signal values may be writen only in decimal numbers. Please dont onustthat control signals can have either of the folowing values of $,$ or $\text{'}$X$.$ All register addresses must be in decimal $($$t would be written as $8$ etc$).$Assume that before running the instructions, the starting initial values of SvD $=10$ and Sal$=6$PC: $0$x$08$: add $s$5,$$v$0,5$a$1$PC: $0$x$0$C: addi $s$4,$$$$5,4$PC: $0$x$10$: sub $s$0,$$s$4,585$PC: $0$x$14$: Iw $t$3,5($$s$0)$PC: $0$x$14$: j exitaddRs:Rt:$BusA:Reg Write:RW:'RegDst:ALUSre:ExtOp:ALUResult:MemtoReg:BusB:Bus W:addiRs:BusA:RW:ALUSre:Rt:RegWrite:RegDst:ExtOp:ALUResult:MemtoReg:J:BusW:subExtOp:BusA:ALUSre:ALUResult:Bne:MemToReg:Rs:BusW:RW:RegDst:Mem Write:BusB:IwBusA:Rt:ExtOp:ALUResult:MemRead:Beq:Reg Write:ExtOp:Mem Write:MemRead:MemtoReg:Page