$5-$ Consider a $2G8$ DDR$5-6400$ SDRAM chip with $32k$ rows, $8k$ columns, $8-$bit chunk, and $8$ banks.

$($a$)$ Suppose a PC has a $64-$bit system $($i$.$e$.,$ memory$)$ bus. How many $2G8$ DDR$5$ SDRAM chip would be

required to implement a $16$ GB DIMM with a single rank $($i$.$e$.,1$R$)?$

$($b$)$ What would be the required burst length if L$2$ cache block size is $64$ bytes?

$($c$)$ If the $16$GB DDR$5-6400$ DIMM is referred to as PC$51200,$ what is the clock rate of the system or memory

bus?

$($d$)$ Determine the number of $16$ GB DIMMs required to implement $32$ GB of main memory.

$($e$)$ Show the address mapping for $36-$bit physical address for $32$ GB of main memory by indicating Rank ID$,$

Bank ID$,$ Row ID$,$ and Column ID fields and the numbers of bits required for each field.