$5.$ Consider the sequential implementation of Booth multiplication shown in slide $7-58.$ Assume that the widths $\backslash ($ n $\backslash )$ of the multiplicand $\backslash ($ M $\backslash )$ and the multiplier are both $8$ bits. Produce a table, similar to the one at the bottom right$-$hand corner of slide $7-58,$ that shows the changing contents of the $\backslash (\backslash$mathrm$\{$P$\},\backslash$mathrm$\{$Q$\}\backslash )$ and F registers when the multiplication $\backslash (01001101\backslash$times $10010000\backslash )$ is performed. $[15$ marks$]$