Question: 6. a) Design a l-bit half subtractor using 2 input NAND gates only. b) Design a l-bit full adder using 2, 1-bit half adders and

6. a) Design a l-bit half subtractor using 2 input NAND

6. a) Design a l-bit half subtractor using 2 input NAND gates only. b) Design a l-bit full adder using 2, 1-bit half adders and one OR gate

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