6.46 Adder Karnaugh maps, I. A half adder is a circuit which takes in one-bit binary numbers a and b and outputs a sum s and a carry out co. The concatenation of co and s co, s is the two-bit value that results from adding a and b (e.g., if a 1 and b 1,s 0 and co 1). Half adders are described in more detail in Chapter 10. (a) Write out truth tables for the s and co outputs of a half adder (b) Draw Karnaugh maps for the s and co outputs of the half adder. (c) Circle the prime implicants and write out the logic equations for the s and co outputs of the half adder