Question: 7. Once the scheduler code is moved, the empty and allows what? A. Put processor to sleep 12. Which lines set the synchSM state to

 7. Once the scheduler code is moved, the empty and allowswhat? A. Put processor to sleep 12. Which lines set the synchSMstate to -1 to ate that the initial SM transition should befunction's "while (1)" idle loop will beo taken? A. 86, 129 B.

7. Once the scheduler code is moved, the empty and allows what? A. Put processor to sleep 12. Which lines set the synchSM state to -1 to ate that the initial SM transition should be function's "while (1)" idle loop will beo taken? A. 86, 129 B. Wait for next TimeriSR C. Enter low power mode D. All of the above B. 72, 110 C. 47, 53 D. 99, 152 18. When running, which line specifically deals with timer overrun detection? A. 28 B. 12 C. 31 D. 59 13. When starting the synchronous state machines, the elapsedTime variable is set to the period value so that the SM is marked as ready to execute immediately. Where in the listing is this done? A. 20, 21 B. 49, 55 . 36 19. An automatically detected incorrect TimerISR execution is known as what? A. Exception B. Priority C. Exit(1) D. Interrupt D. 37 14. A task scheduler determines when each task should be executed in a multiple-task system. Each task is processed in a round-robin manner in the Example code. Which lines implement the task scheduler? A. 10-15 B. 44-65 C. 35-41 20. In the case of timer overruns, the programmer may solve the problem by modifying the system to: A. lengthening SM periods, B. decreasing SM actions, C. decreasing the number of Sms D. 31-34 15. The task processing technique scales easily for D. All of the above 21. What parameter of a microprocessor system i more tasks, e.g., 5 tasks, 10 tasks, or even 100 tasks; which scheduler lines have to be changed to scale for more tasks A. 35 B. 29-43 C. 35-41 D. none the percentage of time that the microcontroller is actively executing tasks: = (time executing. total time) * 100% A. Duty Cycle B. Utilization C. GCD 16. Code presented earlier in chapters before D. Hyperperiod chapter 7 just had the Timer ISR set a flag ote schedu odehas ben moe22. What of a synchsM ask is det directly where? A. TL_States(0 B. BL_States0 C. TimerISR D. main time to execute the absolute maximum number of instructions for any possible tick of the synchSM. A. worst-case execution time (or WCET) B. GCD C. LCD D Priorty 7. Once the scheduler code is moved, the empty and allows what? A. Put processor to sleep 12. Which lines set the synchSM state to -1 to ate that the initial SM transition should be function's "while (1)" idle loop will beo taken? A. 86, 129 B. Wait for next TimeriSR C. Enter low power mode D. All of the above B. 72, 110 C. 47, 53 D. 99, 152 18. When running, which line specifically deals with timer overrun detection? A. 28 B. 12 C. 31 D. 59 13. When starting the synchronous state machines, the elapsedTime variable is set to the period value so that the SM is marked as ready to execute immediately. Where in the listing is this done? A. 20, 21 B. 49, 55 . 36 19. An automatically detected incorrect TimerISR execution is known as what? A. Exception B. Priority C. Exit(1) D. Interrupt D. 37 14. A task scheduler determines when each task should be executed in a multiple-task system. Each task is processed in a round-robin manner in the Example code. Which lines implement the task scheduler? A. 10-15 B. 44-65 C. 35-41 20. In the case of timer overruns, the programmer may solve the problem by modifying the system to: A. lengthening SM periods, B. decreasing SM actions, C. decreasing the number of Sms D. 31-34 15. The task processing technique scales easily for D. All of the above 21. What parameter of a microprocessor system i more tasks, e.g., 5 tasks, 10 tasks, or even 100 tasks; which scheduler lines have to be changed to scale for more tasks A. 35 B. 29-43 C. 35-41 D. none the percentage of time that the microcontroller is actively executing tasks: = (time executing. total time) * 100% A. Duty Cycle B. Utilization C. GCD 16. Code presented earlier in chapters before D. Hyperperiod chapter 7 just had the Timer ISR set a flag ote schedu odehas ben moe22. What of a synchsM ask is det directly where? A. TL_States(0 B. BL_States0 C. TimerISR D. main time to execute the absolute maximum number of instructions for any possible tick of the synchSM. A. worst-case execution time (or WCET) B. GCD C. LCD D Priorty

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