8. It is desired to multiplex four different input data lines, a-d, onto one output. Five address lines, ("V" NISBI through z" LSB) control input-to-output selection. The five-bit address can be stated as a hexadecimal number ranging from 0x00 to Oxlf. Input a is MUXed out on address 0x06, b on address Ox0f, c on 0xlb, and d on 0xle. Draw the MUX circuit below Dbo 9. The truth table for a 1-bit subtract onlv circuit is shown at the right. This circuit could be used in an n-bit subtractor by tying n of these 1-bit subtractors together. This is a full subtractor, which means that the inputs are x (the bit to be subtracted from), y (the bit that is subtracted from x), and borrow in (bi), the number that results when the adjacent column to the right has a y number bigger than x (or y and x are equal, but there is a borrow from the next-right column). Outputs are difference (D) and borrow out (bo). Fill in the two Karnaugh maps below, simplify, write the SOP expressions for D and bo, and draw the two SOP circuits. 0 011 0 1100 10011 10101 1100 0 xy 0001 10 00 01 10 bi bi Difference (D) Borrow Out (bo)