a) [4 points] Based on the latency in nanoseconds shown in the table, if the architect chose to implement a Single-Cycle Datapath, what is i) the cycle time per instruction and ii) the throughput (instructions per second) for this program?

b) [8 points] Now, if the architect implemented a Multi-Cycle Datapath machine, what is i) the cycle time per instruction for this program? Using the distributions of the instructions in this program find ii) the average latency and then the throughput of this program. Is the Multi-cycle datapath faster than the single-cycle datapath for this program?

c) [2 points] Finally, if the architect decided to pipeline this machine into 5 stages, what is the clock cycle and the throughput for this program? (Assuming there is no pipeline stall at all).