A)

A 6-bit carry-ripple adder built using 5 full-adders and 1 half-adder to add two 6-bit numbers has a delay of ____ nanosecond(s), if each full-adder has a delay of 6 nanoseconds, the half adder has a delay of 3 nanoseconds, and if each wire connecting the output co of one adder to the input ci of the next adder has 2 nanosecond delay. Assume no delay for the other wires.

Note: Answer with a number. Don't include the units in your answer because they are already given in the text of the paragraph.

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B) A 5-bit carry-ripple adder built using 4 full-adders and 1 half-adder to add two 5-bit numbers has a delay of ____ nanosecond(s), if each full-adder has a delay of 8 nanoseconds, the half adder has a delay of 4 nanoseconds, and if each wire connecting the output co of one adder to the input ci of the next adder has 2 nanoseconds delay. Assume no delay for the other wires. Note: Answer with a number. Don't include the units in your answer because they are already given in the text of the paragraph.