a$.$ A Cyclic Redundancy Check $($CRC$)$ technique had been selected for error detection and recovery in High Data link Control $($HDLC$)$ frame for the purpose of data transmission system. The sample of the message to be transmitted is given as $M(x)=(1010001101)$ and the generator polynomial is given as $G(x)=x^5+x^4+x^2+1$ and it is fed into a CRC circuit.

i$.$ Design the architecture of the required shift register circuit at the

transmitter and generate the transmitted data for the given

message. Validate the correctness of the transmitted data with

mathematical approach.

$[10$ marks$]$

ii$.$ Design the architecture of the required shift register circuit at the

receiver and perform error checking and correction for the received

data. Validate the error detection of the received data with

mathematical approach.

$[7$ marks$]$

Data & Computer Network