Question: ( a ) Consider a Serial in , Sevial out shipt register configured using five pasitive edge triggered flip flops. These 5 flip flops initially

(a) Consider a Serial in, Sevial out shipt register configured using five pasitive edge triggered flip flops.
These 5 flip flops initially contain and FFO 0).
The outputs of these flips are Q4,Q3,Q2,
Q1, QO where Q4 is MSB and Q0 is ??SB. Give the contents of the register after each positive edge of the clock if the data on the serial input line is 11001.
(a) Consider a Serial in, Sevial out shipt register configured using

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