$($a$)$ Consider the $($imaginary$)$ addm instruction, which is coded in the R$-$type format and has the

following effect:

addm $rd,rs,rt,\frac{?}{?}$#$R[rd]$ larrR$[rs]+$Mem$[rt]$

It is possible to include addm in a multicycle processor by modifying the datapath and control unit,

as discussed in class and shown below. Draw a similar diagram on your answer sheet and mark the

changes in connections and$/$or components of the datapath on the diagram for the implementation of

addm. Your implementation of addm should take minimum states for execution.

$($b$)$ Also draw the finite state machine diagram for the addm instruction. Please draw the answers on paper along with explaination