A cyclic redundancy check $($CRC$)$ error detection scheme is constructed to generate a $4-$bit frame check sequence $($FCS$)$ for an $11-$bit message. The generator polynomial, P$($x$)=$ xo $+$ x$2+1($i$.$e$.,$ P$=11001).1)$ Encode the data bit sequence M$($x$)=$ x $++1($i$.$e$.,$ M$=00001111001)$ using the generator polynomial and state the codeword. $[4$ Marks$)2)$ show that the error detection scheme at the receiver can detect the received codeword and contain no error. $[3$ marks$]$