a$)$ Define cache hit ratio.

$[2$ marks$]$

b$)$ Using a suitable diagram, show the sets and blocks arrangement of an $8-$way associativity cache that has $16$ blocks in total.

$[4$ marks$]$

c$)$ If the above cache contains $8$ bytes in each block, draw the address subdivision of a $32-$bit memory address. Clearly indicate byte offset, set index and tag.

$[4$ marks$]$

d$)$ A $2-$way set associativity write$-$back cache has $16$ blocks in total. The Block size is $32$ bytes. It takes $50ns$ to copy a block from memory to cache or from the cache to memory. On a cache hit, each instruction takes $1ns.$ Consider the following memory access sequence generated by the instructions to access data from this cache.

$100,122,126,144,360,620$

Assume initially all cache entries are invalid.

$[15$ marks$]$

i$.$ Calculate the main memory block addresses which are accessed by each memory access.

ii$.$ Find the set index of the cache, where each memory block address is mapped to$.$

iii. For each memory operation, identify whether it is a cache hit or miss.

iv$.$ Calculate the total time taken for the memory access sequence to complete. State any assumptions if any.