A fast, energy efficient computer core minimizes $(1)$ the number of Instructions in the ISA, $(2)$

the number of instructions in a Program from that ISA and $(3)$ number of cycles per instruction

required to execute that Program. Compilers can actually minimize $(2)$ by using the least number

of registers leading us to minimize the likelihood of a 'spill' to memory if a program needs more

registers than it has available.