a$)$ Measure the bias current IB by measuring the drop across the $15$k$$resistor and using Ohms

law.. It should be close to IB$=0\mathrm{.}5$mA

b$)$ Measure DC values of voltages Vx$,$ Vy and Vout. They should be close to Vx$=1\mathrm{.}5$V$,$ Vy$=4$V and

Vout$=5$V in the common source and common drain amplifiers. Use following parameters to

calculate VDSsat$=$VGS$-$VT$,$ gm and ro kn$=90$A$/$V$2,$ VT$=1\mathrm{.}6$V$,$ W$/$L$=170/10,75$V$,$ lambda$=0\mathrm{.}02$V$-1,$

$=0\mathrm{.}3$ Makes sure transistors are in saturation by calculating and verifying VDS$>$VGS$-$VTH

c$)$ Calculate the small signal transconductance gain using gm$=2$IB$/($VGS$-$VT$),$ the output resistance

ro$=1/$lIB$,$ and the bulk transconductance gain gmb$=$gm$[$gamma$/(2$sqrt$(0\mathrm{.}7+$Vx$)-0\mathrm{.}83)]$ voltage

gains Av$=-$gmRD$||$ro for the common source, Av$=-$gmRD$||$ro for the common gate and the voltage

gain AV$=$gm$/($gm$+$gmb$)$ for the voltage follower.. The common drain amplifier should have a

gain AV$=$ gmRD$||$ro without phase inversion.

d$)$ Measure the gain and frequency response of each of the three amplifiers.

e$)$ Perform simulations in TOPSPICE using following dimensions for the NMOS transistor

W$=170$u$,$ L$=10$u $.$ Use following parameters to calculate VDSsat$=$VGS$-$VT$,$ gm and ro: kn$=90$A$/$V$2,$

VT$=1\mathrm{.}6$V$,$ W$/$L$=170/10,75$V$,$ lambda$=0\mathrm{.}02$V$-1,$ $=0\mathrm{.}3$ For your simulations include a $25$pF load

capacitor at the output node.