A priority encoder is a device that takes a 2n-bit input and encodes it to produce an n-bit result. If exactly one input bit is set, the output will be the bit position of that input bit. If more than one input bit is set, the encoder will prioritize the set input bits to determine the correct output.

A) The following code is a dataflow model of a 4-to-2 bit priority encoder using conditional signal assignment in which priority is given to the lowest numbered input. Enter this code into the simulator and test it with all possible input combinations. Make sure to test the case when none of the inputs are set. Show your test-bench code.

library IEEE; use IEEE.std_logic_1164.all; entity pr_encoder is port(S0,S1,S2,S3: in std_logic; Z: out std_logic_vector (1 downto 0)); end entity pr_encoder; architecture dataflow of pr_encoder is begin Z <= 00 after 5ns when S0=1 else 01 after 5 ns when S1=1 else ` 10 after 5 ns when S2=1 else 11 after 5 ns when S3=1 else 00 after 5ns; end architecture dataflow;

B) Rewrite the model using if-then-else statements within a process. Change the priority order to 1, 3, 2 and 0 with 1 being the highest priority input. Re-run the simulation. Show your code.