A sequential circuit of the form shown in figure P-1 is constructed with two D flip-flops...

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A sequential circuit of the form shown in figure P-1 is constructed with two D flip-flops and external gates. Qi Clock Q₁ D₁ GA PT X₁ X₂ Q₁ Q₁ Q₂ X₁ Q₂ 17 117.00-1 Q₂ Clock X₁ X₂ Q₂ D₂₂ A 2₁ Q₂ a X₁ X₂ Figure P-1 Sequential Circuit to be analyzed a. List the state table and draw state diagram for the given circuit. b. Construct a timing chart for the circuit for the given input sequence X₁X210, 01, 10, 11, 11, and 10. Indicate at what times Z has the correct value and specify the correct output sequence. (Assume that X changes midway between falling and rising clock edges.) Initially, Q₁ Q₂=0. A sequential circuit of the form shown in figure P-1 is constructed with two D flip-flops and external gates. Qi Clock Q₁ D₁ GA PT X₁ X₂ Q₁ Q₁ Q₂ X₁ Q₂ 17 117.00-1 Q₂ Clock X₁ X₂ Q₂ D₂₂ A 2₁ Q₂ a X₁ X₂ Figure P-1 Sequential Circuit to be analyzed a. List the state table and draw state diagram for the given circuit. b. Construct a timing chart for the circuit for the given input sequence X₁X210, 01, 10, 11, 11, and 10. Indicate at what times Z has the correct value and specify the correct output sequence. (Assume that X changes midway between falling and rising clock edges.) Initially, Q₁ Q₂=0.

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