A SHORT-RANGE RADAR IS UNDERGOING A TECHNICAL REFRESH THAT WILL USE A NEW APPLICATION-SPECIFIC INTEGRATED CIRCUIT (ASIC) AND FIELD-PROGRAMMABLE GATE ARRAY (FPGA) - FPGA-1 FROM THE SAMESUPPLIER KNOWN AS FPGA_FPGA 1. THE FOLLOWING TABLE SUMMARIZES KEY INFORMATION ABUT THESE COMPONENTS. THE RADAR REQUIRES MULTIPLE INSTANCES OF THE COMPONENTS (ASCI, FPGA 1, FPGA 2, OR A COMBINATION THEREOF). A TRADE-OFF ANALYSIS REVEALED THAT THE ASIC WAS ESSENTIAL FOR ONE CRITICAL FUNCTION BUT USING THE ASIC DFOE ALL FUNCTIONS WAS COST PROHIBITIVE. USING FPGA 1 FOR ALL FUNCTIONS JUST MET COST, PERFORMANCE, AND RELIABILITY WITH LITTLE MARGIN TO SPARE AND EXCEEDED THE SECURITY RISK THRESHOLD. USING THE FPGA 2 MET THE COST AND PERFORMANCE CRITERIA, WAS BORDERLINE FOR RELIABILITY, AND EXCEEDED THE SECURITY THRESHOLD. IT WAS NOT POSSIBLE TO USE COMMON COMPONENTS ACROSS THE SYSTEM WITHOUT EXCEEDING COST, RELIABILITY, PERFORMANCE, OR SECURITY. WHICH OF THE FOLLOWING APPROACHES WOULD BE THE BEST SOLUTION? COMPONENT COST SECURITY RISK PERFORMANCE RELIABILITY ASIC VERY HIGH LOW - IS A TRUSTED FOUNDRY EXCEEDS PERFORMANCE CRITERIA EXCEEDS RELIABILITY CRITERIA FPGA 1 (KNOWN) MODERATE MODERATE TO MODERATE HIGH RISK ASSESSMENT MEETS PERFORMANCE CRITERIA MEETS RELIABILITY CRITERIA FPGA 2 (NEW) LOW LOW RISK ASSESSMENT EXCEEDS PERFORMANCE CRITERIA MARGINALLY MEETS RELIABILITY