A) To measure gate delays, wire the 6 inverters of the 74(LS)04 in series, as shown...

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A) To measure gate delays, wire the 6 inverters of the 74(LS)04 in series, as shown in Figure 12. Feed the first inverter input (pin 1) from the TTL output of the bench function generator or the TTL output of the CADET function generator block. B) Monitor that input with scope Ch.1, and monitor the output of the last inverter (pin 8, assuming all inverters wired left to right) with Ch. 2. Set the function generator frequency to anything over 1kHz. The scope screen should resemble Figure 13. C) Read from the scope the delay from the Ch.1 wave rise to the Ch. 2. TTL Delay (6 gates) =_ Divide by 6 to get the individual gate delay = D) Using the measured delay, draw a timing chart in Figure 14 showing the output of each inverter, in the graph below. Label the times on the transition points. ns Get your instructor signature approving your data:_ Also note the rise time of the output wave, the elapsed time from the 10% to 90% voltage levels:_______ns ns Input Gatel Gate2 Gate3 Gate4 Gate5 Gate6 Figure 12: 6 inverters for delay measuring ***** ***** ******* Figure 13: Input and output waves, 6 inverters Figure 14: Hand-drawn waves of 6 inverters E) Replace the TTL chip with a CMOS 74C04, 74HC04, or 74ACT04 (Circle your chip type). Redo the measurements: Delay (6 gates) = ns Divide by 6 to get the individual gate delay = ns Also note the rise time of the output wave, the elapsed time from the 10% to 90% voltage levels: Compare the TTL delay to CMOS delay and rise time: T(ns) ns A) To measure gate delays, wire the 6 inverters of the 74(LS)04 in series, as shown in Figure 12. Feed the first inverter input (pin 1) from the TTL output of the bench function generator or the TTL output of the CADET function generator block. B) Monitor that input with scope Ch.1, and monitor the output of the last inverter (pin 8, assuming all inverters wired left to right) with Ch. 2. Set the function generator frequency to anything over 1kHz. The scope screen should resemble Figure 13. C) Read from the scope the delay from the Ch.1 wave rise to the Ch. 2. TTL Delay (6 gates) =_ Divide by 6 to get the individual gate delay = D) Using the measured delay, draw a timing chart in Figure 14 showing the output of each inverter, in the graph below. Label the times on the transition points. ns Get your instructor signature approving your data:_ Also note the rise time of the output wave, the elapsed time from the 10% to 90% voltage levels:_______ns ns Input Gatel Gate2 Gate3 Gate4 Gate5 Gate6 Figure 12: 6 inverters for delay measuring ***** ***** ******* Figure 13: Input and output waves, 6 inverters Figure 14: Hand-drawn waves of 6 inverters E) Replace the TTL chip with a CMOS 74C04, 74HC04, or 74ACT04 (Circle your chip type). Redo the measurements: Delay (6 gates) = ns Divide by 6 to get the individual gate delay = ns Also note the rise time of the output wave, the elapsed time from the 10% to 90% voltage levels: Compare the TTL delay to CMOS delay and rise time: T(ns) ns

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the experiment to measure gate delays and compare TTL and CMOS chips A Wiring the Inverters In this step you are setting up an experiment to measure t... View the full answer