a. True In general a computer with one level of cache is expected to operall two levels of cache. a. True Tasiu 8. b. False 9 control unit is used in x86 processors. c. DMA d. DRAM a. Microprogrammed b. Hard wired 10. What is the main function of control unit? It causes the processor to step through a series of c. It generates the control signals. It decodes the opcode. a. b. d. All of the above 11. What is the Boolean equation for control signal LA according to this diagram? LDA S UB A 5 LA a. LA (T5+LDA) (SUB+T4)(ADD+T4) d. LA = ( T3+LDA) (SUB-T4)(ADD-T4) 12. The cache hit rate to execute a given code is 98%, what is the miss rate? 2% 12% a. c. 98% d. Not enough information b