Question: All problems here assume 3 2 - bit memory address as in the case of MIPS. A cache with a single block of 6 4

All problems here assume 32-bit memory address as in the case of MIPS. A cache with a single block of 64 Bytes is used with v=1 and tag =0x100. How many bits are used for tag? (answer in decimal, such as 12). How many bits are used for in-block offset? (answer in decimal, such as 3). When accessing memory address 0x2000, this should access which block in memory? (answer in decimal, such as 7). The tag part of this address is (answer in hex, such as 2ac)0x. Is this access a hit? (y/n)

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