All workloads above contain 1 billion instructions. Processor(1) CPI (2,20,6), Vcd=125V, fc=2.0GHz, Pdynamic-50W 1. If we have to implement a single architectural change to improve the overall performance of Processor(1), which instruction type should we improve and why? ii. If we increase the complexity of the Arithmetic instructions (CPI -> 3), increase the frequency of the clock by 25% and reduce the number of Arithmetic instructions required to implement out workloads by 25%, is this a good tradeoff? Explain why If the changes in i, above generate a 25% increase in dynamic power consumption, what additional design parameter should we change? What is the new value of that parameter to achieve the same dynamic power consumption? 3. Signed/Unsigned Numbers and Byte Ordering 120 points) a Using the 32-bit value of OxFFFFFF88 1. Show the value as an unsigned base 10 integer il Show the value as a signed base 10 integer b. Show the 8-bit hexadecimal value for 48 base 10 c. Show the 8-bit binary representation of 48 base 10 d. Show the 8-bit binary representation of 48 base 10