An unsigned binary divider Is shown in Figure B2 which computes the division of an 8-bit dividend by a 4-bit divisor to obtain a 4-bit quotient and remainder. The divider is comprised of a control circuit and data path. a) With regard to the control function, write down b) Time to t etc (1) (ii) Y3 a state diagram, a present/next state table including control signal outputs. For a dividend of 13310 and a divisor of 1010, fill in the following table until the division process is complete. State any assumptions made. State Dividend register [x:xo] St 000000000 So 0 So 000000000 1 Dividend register X X X6 X5 X X X X Xo Subtractor and comparator Yo Figure B2 COO Ld Su 0 1 0 0 Sh Ld C Sh Sh V 0 00 0 00 Su St (Start signal) Control (Overflow indicator) Clock An unsigned binary divider Is shown in Figure B2 which computes the division of an 8-bit dividend by a 4-bit divisor to obtain a 4-bit quotient and remainder. The divider is comprised of a control circuit and data path. a) With regard to the control function, write down b) Time to t etc (1) (ii) Y3 a state diagram, a present/next state table including control signal outputs. For a dividend of 13310 and a divisor of 1010, fill in the following table until the division process is complete. State any assumptions made. State Dividend register (x:xo] St 000000000 So 0 So 000000000 1 Dividend register X X X6 X5 X X X X Xo Subtractor and comparator Yo Figure B2 COO Ld Su 0 1 0 0 Sh Ld C Sh Sh V 0 00 0 00 Su St (Start signal) Control (Overflow indicator) Clock