answer Q$2$ please

Explain the following terms clearly:

$($a$)6\%$ Yield $($for chips$)$

$($b$)6\%$ Forwarding $($for data hazards$)$

$($c$)6\%$ Critical path

$($d$)6\%$ Interleaved memory

The following figure shows a multiplier design that can complete the

multiplication operation in $32$ clock cycles.

$($a$)[7\%]$ We mentioned that the design can be improved and the new

version uses less hardware. Where can you saved and why? Draw your

new design.

$($b$)[7\%]$ With the new design from $($a$),$ we simplify it to the $44$ multiplier.

What would the Product Register contain after two clock cycles if $0111$

and $1011$ are in the Multiplicand and Multiplier, respectively, initially?