Answer the following questions about cache coherency protocols in a mulit-processor system.

a) What is the main advantage of the MESI snoopy cache coherency protocol used in a system in which each processor has a separate cache compared to a snoopy cache coherency protocol that uses only 3 states M, S and I (modified, shared and invalid)?

b) Should the current MESI state be changed from M in response to a write hit from a remote processor to an already modified line in a local cache? Explain your answer.

c) If the 3-state MSI cache coherency protocol is used with a direct mapped cache containing 1048576 lines each of which is 512 bytes in size, what is the total number of bits required to implement the cache coherency protocol for a single cache?