any number please..

1. (a) A half adder is a circuit that adds two bits to give a sum and a carry. Give the truth table for a half adder, and design the circuit using only two gates. (596) (b) Then design a circuit which will find the 2's complement of a 4-bit binary number. using four half adders and any additional gates. (10%) (c) Design a four bit binary adder by using the half adder designed in (a). (5%) (d) using the circuit designed in (c) to design a circuit which will ind the 10's complement of a BCD digit. (10%) 2. Design an excess-3 code converter to drive a seven-segment display. Assume that only circuit using only NAND gates and inverters. Try to minimize the number of gates and 3. Implement a 4-to-16 decoder by using 2-to-4 decoders and some other basic logic gates. 4. Implement a 4-to-1 multiplexer by using 2-to 1 multiplexers and some other basic logic 5. Implement the Boolean function FIA, B,C,D)- 2(1, 2, 5, 7, 8, 10, 12,14, 15) based on using 6. What is the difference between a decoder and a demultiplexer? Give your explanations input combinations representing the digits 0 through 9 can occur as inputs. Design your inverters required. Any solution with 16 or fewer gates and inverters is acceptable. (10%) (10%) gates. (10%) a 8-to-1 multiplexer (10%) with circuits. (10%) sud R nch with 2-hit width, and they may be