Arithmetic-logic units (ALU) are important parts in processors. They perform all logic and arithmetic operations on...

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Arithmetic-logic units (ALU) are important parts in processors. They perform all logic and arithmetic operations on binary data. As ALU are 32 or 64 bits, one way to design them is by designing one-bit slice, duplicating this slice, and connecting all slides to get the desired ALU. Assume that the ALU bit slice shown below is utilized as a component of a much larger ALU which can support two's complement integer arithmetic for the n-bit numbers A-a-...ao and B-bs-1.....bo. Each ALU bit slice has three inputs and two outputs, with Cin;= Couti-1. For the least significant ALU bit slice, Cino must be set accordingly. Up to eight arithmetic or logic operations can be supported via the select lines S(2:0). S(2:0) According to the design specifications, the ALU bit slice must perform the following arithmetic and logical register level operations. b₁ Cin, # ALU Bit Slice Cout Select 000 001 010 011 100 101 110 111 Register Operation ADD EQU GT a) Write a VHDL code to implement this one-bit ALU slide b) Test all functions of this one-bit ALU slice using their Truth tables LT AND OR XOR Arithmetic-logic units (ALU) are important parts in processors. They perform all logic and arithmetic operations on binary data. As ALU are 32 or 64 bits, one way to design them is by designing one-bit slice, duplicating this slice, and connecting all slides to get the desired ALU. Assume that the ALU bit slice shown below is utilized as a component of a much larger ALU which can support two's complement integer arithmetic for the n-bit numbers A-a-...ao and B-bs-1.....bo. Each ALU bit slice has three inputs and two outputs, with Cin;= Couti-1. For the least significant ALU bit slice, Cino must be set accordingly. Up to eight arithmetic or logic operations can be supported via the select lines S(2:0). S(2:0) According to the design specifications, the ALU bit slice must perform the following arithmetic and logical register level operations. b₁ Cin, # ALU Bit Slice Cout Select 000 001 010 011 100 101 110 111 Register Operation ADD EQU GT a) Write a VHDL code to implement this one-bit ALU slide b) Test all functions of this one-bit ALU slice using their Truth tables LT AND OR XOR

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A VHDL Code library IEEE use IEEESTDLOGIC1164ALL Unsigned adder entit... View the full answer