Assume a 48 bit virtual address space (typical for a 64 bit Xeon architecture). Assume 16KB pages, and real memory of 32GB How many bits in a real address? How many bits in a virtual address? How many entries in the page table? Do we need a dirty bit? A valid bit? How many bits in the page offset? In the tag for the real address? Assume 1 (8 byte) word for each page table entry, how many bytes does the page table need? If the page table is considered too big, we can use hierarchical or split page tables to allow parts of the page table to sit on or only be allocated you needed. These strategies add complexity and delay page lookup. Would consider such strategies in this machine