Question: Assume a program requires the execution of 6 0 times 1 0 6 FP instructions, 1 2 0 times 1 0 6 INT
Assume a program requires the execution of times FP instructions, times INT instructions, times LS instructions, and times branch instructions. The CPI for each type of instruction is and respectively. Assume that the processor has a GHz clock rate.a By how much must we improve the CPI of FP instructions if we want the program to run two times faster?b By how much must we improve the CPI of LS instructions if we want the program to run two times faster?c By how much is the execution time of the program improved if the CPI of INT and FP instructions is reduced by and the CPI of LS and Branch is reduced by When a program is adapted to run on multiple processors in a multiprocessor system, the execution time on each processor is comprised of computing time and the overhead time required for locked critical sections andor to send data from one processor to another.Assume a program requires t s of execution time on one processor. When running p processors, each processor requires tp s as well as an additional s of overhead, irrespective of the number of processors. Compute the perprocessor execution time for processors. For each case, list the corresponding speedup relative to a single processor and the ratio between actual speedup versus ideal speedup speedup if there was no overhead Assume for arithmetic, loadstore and branch instructions, a processor has CPIs of and respectively. Also assume that on a single processor, a program requires the execution of E arithmetic instructions, E loadstore instructions, and million branch instructions. Assume that each processor has a GHz clock frequency.Assume that, as the program is parallelized to run over multiple cores, the number of arithmetic and loadstore instructions per processor is divided by times p where p is the number of processors but the number of branch instructions per processor remains the same.Find the total execution time for this program on and processors, and show the relative speedup of the and processors result relative to the single processor result.To what should the CPI of loadstore instructions be reduced in order for a single processor to match the performance of four processors using the original CPI values? One challenge for architects is that the design created today will require several years of implementation, verification, and testing before appearing on the market. This means that the architect must project what the technology will be like several years in advance. Sometimes, this is difficult to doa According to the trend in device scaling historically observed by Moores Law, the number of transistors on a chip in should be how many times the number in assume # Transistors double every yearsb The increase in performance once mirrored this trend. Had performance continued to climb at the same rate as in the s approximately what performance would chips have over the VAX in assume performance increases every year Consider the following two processors. P has a clock rate of GHz average CPI of and requires the execution of E instructions. P has a clock rate of GHz an average CPI of and requires the execution of E instructions.a One usual fallacy is to consider the computer with the largest clock rate as having the highest performance. Check if this is true for P and Pb Another fallacy is to consider that the processor executing the largest number of instructions will need a larger CPU time. Considering that processor P is executing a sequence of E instructions and that the CPI of processors P and P do not change, determine the number of instructions that P can execute in the same time that P needs to execute E instructions.c A common fallacy is to use MIPS millions of instructions per second to compare the performance of two different processors, and consider that the processor with the largest MIPS has the largest performance. Check if this is true for P and P
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