Question: Assume a program requires the execution of 6 0 times 1 0 6 FP instructions, 1 2 0 times 1 0 6 INT

Assume a program requires the execution of 60\times 106 FP instructions, 120\times 106 INT instructions, 60\times 106 L/S instructions, and 16\times 106 branch instructions. The CPI for each type of instruction is 1,1,4, and 2, respectively. Assume that the processor has a 2 GHz clock rate.(a) By how much must we improve the CPI of FP instructions if we want the program to run two times faster?(b) By how much must we improve the CPI of L/S instructions if we want the program to run two times faster?(c) By how much is the execution time of the program improved if the CPI of INT and FP instructions is reduced by 50% and the CPI of L/S and Branch is reduced by 25%?2. When a program is adapted to run on multiple processors in a multiprocessor system, the execution time on each processor is comprised of computing time and the overhead time required for locked critical sections and/or to send data from one processor to another.Assume a program requires t =200 s of execution time on one processor. When running p processors, each processor requires t/p s, as well as an additional 10 s of overhead, irrespective of the number of processors. Compute the per-processor execution time for 2,4,8,16,32,64 processors. For each case, list the corresponding speedup relative to a single processor and the ratio between actual speedup versus ideal speedup (speedup if there was no overhead).3. Assume for arithmetic, load/store, and branch instructions, a processor has CPIs of 2,10, and 5, respectively. Also assume that on a single processor, a program requires the execution of 2.56E9 arithmetic instructions, 1.28E9 load/store instructions, and 128 million branch instructions. Assume that each processor has a 2GHz clock frequency.Assume that, as the program is parallelized to run over multiple cores, the number of arithmetic and load/store instructions per processor is divided by 0.7\times p (where p is the number of processors) but the number of branch instructions per processor remains the same.Find the total execution time for this program on 1,2,4, and 8 processors, and show the relative speedup of the 2,4, and 8 processors result relative to the single processor result.To what should the CPI of load/store instructions be reduced in order for a single processor to match the performance of four processors using the original CPI values? 4. One challenge for architects is that the design created today will require several years of implementation, verification, and testing before appearing on the market. This means that the architect must project what the technology will be like several years in advance. Sometimes, this is difficult to do.a. According to the trend in device scaling historically observed by Moores Law, the number of transistors on a chip in 2025 should be how many times the number in 2015?[assume # Transistors double every 2 years]b. The increase in performance once mirrored this trend. Had performance continued to climb at the same rate as in the 1990s, approximately what performance would chips have over the VAX-11/780 in 2025?[assume performance increases 52% every year]5. Consider the following two processors. P1 has a clock rate of 4GHz, average CPI of 0.9, and requires the execution of 5.0E9 instructions. P2 has a clock rate of 3GHz, an average CPI of 0.75, and requires the execution of 1.0E9 instructions.a. One usual fallacy is to consider the computer with the largest clock rate as having the highest performance. Check if this is true for P1 and P2.b. Another fallacy is to consider that the processor executing the largest number of instructions will need a larger CPU time. Considering that processor P1 is executing a sequence of 1.0E9 instructions and that the CPI of processors P1 and P2 do not change, determine the number of instructions that P2 can execute in the same time that P1 needs to execute 1.0E9 instructions.c. A common fallacy is to use MIPS (millions of instructions per second) to compare the performance of two different processors, and consider that the processor with the largest MIPS has the largest performance. Check if this is true for P1 and P2.

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