Assume that an interrupt mechanism uses the hardware stack to store PC and other registers of...

  

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Assume that an interrupt mechanism uses the hardware stack to store PC and other registers of the interrupted computations. The interrupt mechanism recognizes 4 interrupt vectors IV [1], IV [2], IV [3], IV [4] initialized by addresses of their corresponding ISR I=1..4. The elements of the hardware stack are a record R, where each field stores a specific CPU register (R.PC is the field, which stores the program counter PC and so on). The Hardware stack is manipulated using the standard stack operation Pop, Push, EmptyStack. a) Explain how the CPU detects an interrupt signal I and what actions should be taken ? b) Write the initial and final sequences of instruction of a given ISR I. (Transparency). c) Write the ISR4 such that whatever number of interrupted computation (in the stack) it gives the control to the first one interrupted. Activate Windows Assume that an interrupt mechanism uses the hardware stack to store PC and other registers of the interrupted computations. The interrupt mechanism recognizes 4 interrupt vectors IV [1], IV [2], IV [3], IV [4] initialized by addresses of their corresponding ISR I=1..4. The elements of the hardware stack are a record R, where each field stores a specific CPU register (R.PC is the field, which stores the program counter PC and so on). The Hardware stack is manipulated using the standard stack operation Pop, Push, EmptyStack. a) Explain how the CPU detects an interrupt signal I and what actions should be taken ? b) Write the initial and final sequences of instruction of a given ISR I. (Transparency). c) Write the ISR4 such that whatever number of interrupted computation (in the stack) it gives the control to the first one interrupted. Activate Windows

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