Question: Assume that register bank conflicts are not a problem ( we ve solved this somehow ) and look at the original code above ( not

Assume that register bank conflicts are not a problem

(

ve solved this somehow

)

and look at the original code above

(

not your modifications from d

.) .

How many pipeline stalls due to data hazards will occur while executing this program? Assume that no control hazards occur and that the pipeline is always fed with the next instruction from the correct branch.

(3

points

)

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