$.$ Assume the cache line $($cache block$)$ in a multiprocessor shared memory

system is of size $64$ bytes. Choose a statement from $($a$)$ to $($d$)$ below that is false or

choose $($e$)$

$($a$)$ When a processor executes a store instruction to write a word of $4$ bytes to

memory, this triggers the writing of a data block of $64$ bytes from a local

processor cache to memory.

$($b$)$ When a processor executes a load instruction of $4$ bytes to read such a word

from memory, this triggers the reading of a data block from memory to a local

processor cache when there is a cache miss.

$($c$)$ Writing a data block to a processor cache has to invalidate copies of this block in

other processor caches even these processors do not use this data block any

more.

$($d$)$ False sharing can occur when multiple processors write data to different but

consecutive data addresses in memory.

$($e$)$ All of them are correct.