Assume the CPU is executing a program and the state of some of its registers is given in the table below. Show how the registers would be updated by the sequence of ARM$64$ instructions listed below by filling in the Final Value column.

Show your work by listing the intermediate values of the registers.

$\backslash$table$[[$Register$,$Current Value $($show work here$),$Final Value$],[$x $0,0,],[$x $1,1,],[$x $2,2,],[$x$3,3,]]$

Update the register state based on these instructions:

$\backslash$table$[[$add$,$x$0,,$x$0,,$#$20],[$add$,$x$1,,$x$0,,$x$1],[$sub$,$x$2,,$x$2,,$x$1],[$add$,$x$2,,$x$2,,$#$3],[$sub$,$x$3,,$x$3,,$x$2],[$add$,$x$3,,$x$3,,$x$3],[$sub$,$x$3,,$x$3,,$#$1],[$lsr$,$x$1,,$x$1,,$#$4],[$and$,$x$3,,$x$3,,$#$0$xfe$],[$eor$,$x$0,,$x$0,,$x$0],[$orr$,$x$2,,$x$2,,$#$0],[$mvn$,$x$1,$x$1,],[$add$,$x$1,,$x$1,,$#$1]]$