Assume, the reference delay as: r = 0.69R1C1 and reference energy as: Er = C1VDD 2 where, R1 is the resistance of the first stage (the ratio is chosen such that PMOS and NMOS have same resistance). The reference energy delay product is EDPref = Err. Neglect CFET in the entire analysis. (a) Derive an expression for the total energy dissipated in the chain for one complete swing of the input (i.e. low-to-high + high-to-low) (assume u> 1) in terms of 'u', Er, CL, and C1