Question: Assuming the cache is filled with the following data: cache way 1 Line Number Valid Bit Tag cache way 2 Data Valid Bit Tag Data

Assuming the cache is filled with the following data: cache way

Assuming the cache is filled with the following data: cache way 1 Line Number Valid Bit Tag cache way 2 Data Valid Bit Tag Data 00...00011 1 00...01... 1 10...00... 1 00...01000 00...01001 10...01... 10...00... 0 1 00...10... 00...00... 0 In this table, ... represents a sequence of zero(s) Given the following memory references, identify each of them as a cache hit (write H in the blank) or a cache miss (write M in the blank). Hints: The valid bit indicates a cache entry that is not actually valid anymore for some reason (maybe cache invalidated because of write in other core/cache for example). So if a reference resolves to a line that is not valid, it is still a miss. Make sure you correctly identify the line and tag when determining a hit or miss here. Word Tag Line Offset 00...0000...010011100100 Word Tag Line Offset 10...00 00...01001 0110110 Tag Line Word Offset 10...01 00...00011 1110011 Word Tag Line Offset 10...0000...000110110110 Word Tag Line Offset 10...0100...010000100010

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