$($B$)(2$ points$)$ On the figure below, draw$-$in lines cutting across the microarchitecture to represent the placement of pipeline latches for the standard $5-$stage pipeline from the class. Label the new stages you have created appropriately.

$($C$)(5$ points$)$ Given the stages as you have drawn them, calculate the new clock frequency for the design. $62\mathrm{.}5$ MHz Clock rate

$($D$)(3$ points$)$ Calculate the best$-$case speed up of your new design vs$.$ the baseline non$-$pipelined design $($assume no hazards are induced$).$

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S$=62\mathrm{.}5/19\mathrm{.}6=3\mathrm{.}19\backslash$mathrm$\{$X$\}$

$\backslash ]$