| B | A | g | f | e | d | c | b | a | |---|---|---|---|---|---|---|---|---| | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |

g = BA'

f = B' + A'

e = B + A'

d = BA' + BA

c = B'A

b = 0

a = BA

In the truth table above B, and A are the inputs and the rest are the outputs. These are the boolean expressions I derived for the outputs.

Design a logic circuit for the above 2-bit decoder with the 2 inputs and 7 outputs above using only NAND gates with a maximum of 8 NAND gates.