$($b$)$ Explain the 'Register Indirect' addressing mode in $8086$ processor with suitable diagrams.

$($c$)$ Design the memory architecture around an $8-$bit data bus and $16-$bit address bus CPU where you

connect $2$ KBytes SRAM chips to get $32$ KBytes RAM at addresses $4000$ H$-7$FFFH $(16$KB$)$ and

$C000H-{}_{F}FFFH(16KB).$

$1+5+8$