Both Parts Please

2. Problem 4. (25 points), Clocks Time, Timers Consider the following code segment. Assume that processor clock in the active mode is set to 1,000,000 Hz. Assume that P3 is configured as output and initially P30UT is clears (0x00). 1. while(1) { int i; 3. for(i - 1600; i>0; i--); // one loop iteration takes 5 clock cycles P3OUT - BITS; // Set P3.5 for (i = 800; 1>0; i--); // Delay P30UT & -BITS; // Clear P3.5 7. 4. 5. 6. A. (10 points) What does the code segment do assuming that P3.5 is configured as a digital output. You may ignore delay needed to execute instructions in lines 1, 4 and 6. B. (15 points) How would you implement functionality achieved by the code segment above using Timer. Port P3.5 is multiplexed with the output signal from the capture and compare block 4 of TimerB. Give details. How would you initialize the system? What would you do in the main loop? Assume the SMCLK is used which is 2-20 =1,048,576 Hz