Question: C to decode the 3 2 k 8 memory blocks ( EPROMs and SRAMs ) controlled by Ys . Addresses available start 5 0 0

C
to decode the 32k8 memory blocks (EPROMs and SRAMs) controlled by Ys.
Addresses available start 50000H and another D0000.
How many memory block required from EPROMs and SRAMs?
Determine the typical range address of added EPROMs and SRAMs?
Determine the range of each memory block controlled by Ys?
Design and draw the memory decoding using 74138 circuitries in which the
C to decode the 32k8 memory blocks (EPROMs and SRAMs) controlled

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